add some missing wiring
This commit is contained in:
parent
73cc468d8f
commit
608fe57b50
@ -88,7 +88,7 @@
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(aux_axis_origin 100 100)
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(grid_origin 100 100)
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(pcbplotparams
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(layerselection 0x0000030_80000001)
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(disableapertmacros no)
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(usegerberextensions yes)
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@ -120,9 +120,9 @@
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(subtractmaskfromsilk no)
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(mirror no)
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(outputdirectory "")
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(outputdirectory "out")
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(net 0 "")
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@ -1929,7 +1929,7 @@
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(descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator")
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(tags "resistor handsolder")
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(property "Reference" "R3"
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(uuid "a62bed37-c099-4515-8a84-f194e53629cf")
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(effects
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@ -1940,7 +1940,7 @@
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(uuid "38f2d04d-760f-4c23-8893-3c7ee8ed01ef")
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(effects
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@ -2095,7 +2095,7 @@
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(uuid "df5cb01c-b803-407d-9cfe-bdb33097228a")
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(fp_text user "${REFERENCE}"
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(at 0 0 360)
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(layer "F.Fab")
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(effects
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@ -2355,7 +2355,7 @@
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(descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator")
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(tags "resistor")
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(property "Reference" "R5"
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(at 0 -1.65 360)
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(layer "F.SilkS")
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(uuid "75aed016-c4f5-4be7-8a6a-373ec23042ca")
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(effects
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@ -2366,7 +2366,7 @@
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(property "Value" "3k74"
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(at 0 1.65 360)
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(layer "F.Fab")
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(uuid "16edd840-1bcf-4238-bfd8-4c9591bb3559")
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(effects
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@ -2521,7 +2521,7 @@
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(uuid "7b698240-3289-43e8-9850-115e6335d6a3")
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(fp_text user "${REFERENCE}"
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(at 0 0 360)
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(layer "F.Fab")
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(effects
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@ -3861,7 +3861,7 @@
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(descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator")
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(tags "resistor")
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(property "Reference" "R4"
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(at 0 -1.65 360)
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(layer "F.SilkS")
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(uuid "10c68398-1fff-4cdf-a2ea-932961831ea3")
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(effects
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@ -3872,7 +3872,7 @@
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(property "Value" "43k2"
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(effects
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@ -4027,7 +4027,7 @@
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(uuid "9ff7d2ce-935b-46da-a9b7-28ce605d82f2")
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(fp_text user "${REFERENCE}"
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(at 0 0 360)
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@ -6552,16 +6552,6 @@
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@ -6596,27 +6586,6 @@
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(layer "Dwgs.User")
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@ -6639,17 +6608,6 @@
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@ -6915,18 +6873,6 @@
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(gr_text "Extend PCB edge 0.5mm if using SMT header"
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(justify left)
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(layer "Dwgs.User")
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@ -6954,6 +6900,30 @@
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(width 0.2)
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(layer "F.Cu")
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(net 37)
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(uuid "4a6102d1-d546-45ce-956d-46fb974d4438")
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)
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(net 37)
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(net 37)
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)
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(at 119.5 61.25)
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@ -7434,6 +7604,14 @@
|
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(net 39)
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)
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(end 136 61)
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(layer "F.Cu")
|
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(net 40)
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||||
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|
||||
)
|
||||
(zone
|
||||
(net 30)
|
||||
(net_name "+5V")
|
||||
@ -7526,37 +7704,6 @@
|
||||
)
|
||||
)
|
||||
)
|
||||
(zone
|
||||
(net 1)
|
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(net_name "GND")
|
||||
(layer "F.Cu")
|
||||
(uuid "3c8b40ce-0e3c-44b7-a667-534d15d95841")
|
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(hatch edge 0.5)
|
||||
(priority 6)
|
||||
(connect_pads
|
||||
(clearance 0)
|
||||
)
|
||||
(min_thickness 0.25)
|
||||
(filled_areas_thickness no)
|
||||
(fill yes
|
||||
(thermal_gap 0.5)
|
||||
(thermal_bridge_width 0.5)
|
||||
(island_removal_mode 1)
|
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(island_area_min 10)
|
||||
)
|
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(polygon
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(pts
|
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(xy 128.5 53) (xy 136.5 53) (xy 136.5 54) (xy 128.5 54)
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)
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)
|
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(filled_polygon
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|
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)
|
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)
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)
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(zone
|
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(net 38)
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(net_name "Net-(U2-PH)")
|
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@ -7622,9 +7769,10 @@
|
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(filled_polygon
|
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(layer "F.Cu")
|
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(pts
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(xy 125.624 55.35) (xy 125.556961 55.330315) (xy 125.511206 55.277511) (xy 125.5 55.226) (xy 125.5 53.124)
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|
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|
||||
)
|
||||
)
|
||||
)
|
||||
|
@ -503,7 +503,7 @@
|
||||
"gencad": "",
|
||||
"idf": "",
|
||||
"netlist": "",
|
||||
"plot": "",
|
||||
"plot": "out",
|
||||
"pos_files": "",
|
||||
"specctra_dsn": "",
|
||||
"step": "",
|
||||
|
Loading…
Reference in New Issue
Block a user